并行存储器
A Parallel Memory Cache System and Its Implementation
一种并行内存缓冲系统及其实现技术
In this paper the relationship between memory contention and ( a, M), the greatest common divisor of a and M, is investigated, where M is the number of parallel memory modules, and a is a constant increment of address.
本文论述了以增量a(常数)访问M个体组成的并行存储器时,存取碰头和(a,M)的关系,这里(a,M)表示a和M的最大公因数。
Thirdly, based on the consideration of improving the utilizing efficiency of off-chip bandwidth, we have designed and implemented a data-parallel memory system for our Tiled Stream Processor in current project.
从提高片外带宽使用率的角度出发,设计和实现了分片式流处理器的数据并行存储系统。
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